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Click on the following bookmarks for further details of a PCB Tool for emc analysis:

Decoupling capacitance
Characteristic impedance of various track geometries
Transmission line test for a PCB track
Common mode rejection ratio reduction
Ground plane and PCB track impedances
Amplifier Ground Noise analysis
Differential mode radiated emission
Common mode radiated emission

Decoupling Capacitance

    The decoupling capacitance tool analyses the arrangement shown in the diagram below. Note that it is assumed that the power supply does not supply any current during the current pulse.

Decouple.gif (2619 bytes)

    The data entry form allows definition of the basic decoupling capacitance, and any residual ground inductance and resistance. The pulse is defined by a current pulse for a defined period, and a spot analysis provides the voltage at the end of the pulse. For instance, a nominal 5 volt supply supported by a 1nF capacitor, supplying a 30ns wide 50mA current demand, droops to a device voltage of 3.7 volts at the pulse end.

Decoup-form.gif (6180 bytes)

    The plot function produces a graph of the entire voltage/time behaviour, and indicates the pulse end with a vertical line, as shown in the plot below for the above parameters.

Decoup-graph.gif (6770 bytes)

    The effect of ground inductance is to cause an initial dip in the voltage at the device.

Characteristic Impedance of various track geometries

This tool calculates the characteristic impedance of the track geometries shown below:

Charimp.gif (4096 bytes)

    In all cases, the relative dielectric constant Er of the surrounding medium can be defined. The equations used for each calculation are as follows.

Embedded Stripline

            Zo = ( Er )-0.5 * 60 * loge ( 2.375 / ( w + 1.25 * t))    ohms


            Zo =[ loge (( 7.475 * h ) /( w + 1.25 * t ))] / [0.115 * ( Er + 1.41) 0.5]     ohms

Parallel Strips, horizontally spaced

            Zo = 120 * ( Er )-0.5 * loge ( (3.142 * h) / ( w + t))    ohms

Parallel Strips, vertically spaced

            Zo = 377 * ( Er )-0.5 * h / w    ohms

Single Wire over Ground Plane

            Zo = 60 * ( Er )-0.5 * loge ( 4 * h / d )    ohms            

Parallel Wires

            Zo = 120 * ( Er )-0.5 * loge ( 2 * s / d )    ohms  

Transmission line test for a PCB track

    This tool examines stripline and microstrip tracks, and calculates their propagation delay and characteristic impedance. The relative dielectric constant of the medium can be specified, and a default entry of 4.5 is supplied, corresponding to epoxy glass. The geometrical details are shown below:

Ttest.gif (2116 bytes)

    In addition to the basic line properties, the effect of device capacitance may also be estimated. The lumped capacitance entered is then calculated as a distributed capacitance per unit length.

    The commentary provides the minimum device transition time below which transmission line effects may be encountered. The data entry form, with a typical example is shown below.

Tttest-f.gif (7770 bytes)

    For equivalent dimensions, microstrip supports slightly faster transition times before transmission line effects may occur.

    Where the transition time of a digital signal is less than the total propagation time along a track to the load, and back to the source, transmission line effects may occur. The above rule of thumb is used by the tool for defining a limit below which ringing, signal distortion and crosstalk onto adjacent lines may occur, if lines are not terminated in their characteristic impedance. Commonly encountered transition times range from as high as 40ns for CMOS, to below 1.5ns for Advanced Schottky devices. In the first instance, tracks can be as long as 3.5 metres before transmission line effects need to be considered, whilst the Schottky device transition time could produce transmission line effects with tracks as short as 135mm.

Common mode rejection ratio reduction

    Balanced lines offer, in principle, infinite rejection to common mode signals, these being cancelled out at the load. However, any imbalance in the amount of capacitance from either line to ground will result in a net signal at the load. The dB ratio of the load voltage to the common mode signal is defined here as the common mode rejection ratio. For a perfectly balanced system this is infinitely large.

    Two effects can cause capacitive imbalance; firstly, stray capacitance to ground, perhaps of the order of ten's of pF. Secondly, the use of capacitive filter components, where the tolerance of the component produces the imbalance. As filter capacitor values of the order of nF are in common use, imbalances of several hundred pF are possible. These can reduce common mode rejection ratio down into the audio band. The circuit arrangement for the common mode rejection ratio tool is shown below:

Cmrr.gif (2680 bytes)

A spot analysis of the common mode rejection ratio is provided at the selected frequency, whilst a plot may also be made. If the two capacitances are entered as equal values, a message warns that the rejection ratio will be infinite. A typical plot is shown below.

Cmm-grapg.gif (6758 bytes)

The Common mode rejection ratio form is shown below:

Cmm-f.gif (7076 bytes)

Ground plane and PCB track impedances

    A continuous ground plane offers a significantly reduced rf impedance compared to a pcb track. The low resistance and inductance of the ground plane will reduce supply impedance and reduce ground loop noise. At higher frequencies, skin effect causes the ground plane impedance to rise, although this is proportional to the square root of frequency.

    PCB track impedance however increases proportionally with frequency. The ground plane impedance values stated are mohms per square, and for a distance between two points which is less than the board width, is independant of the distance. The impedance will increase for other geometries, or where the two points are near the edge of the board. At the very edge of the board, the impedance will be double what is in the centre of the board.

    An example of two sets of impedances are shown below:

Gplane-form.gif (9664 bytes)

    A set of common materials is provided in a pull-down list, providing conductivity and permeability values. In the example shown, a 50mm long pcb track has an impedance of 1.44 ohms at 5MHz, whilst a ground plane of the same copper thickness has an impedance of only 0.8 mohms per square. As long as the ground plane was much wider than 50mm, the actual impedance between two points 50mm apart would be 0.8 mohms.

    A value for skin depth at the analysis frequency is provided for completeness.

Amplifier Ground Noise Analysis

    The Amplifier Grounding Noise tool analyses two situations where currents flowing in a ground path are coupled to a signal path, subsequently appearing at the input of an amplifier. A single-ended amplifier and a differential amplifier respond in different manners to ground path noise, and different measures can be taken to improve noise rejection.

Single-ended Amplifier
The Single-ended amplifier arrangement is shown below:

580_1.bmp (472374 bytes)

    The worse case performance is produced when the signal source Vs is grounded to the pcb ground (Rg = 0). Ground currents flowing between the point where the amplifier is grounded and the signal source ground are then the source of amplifier input voltages.

    For example, a 100mA current flowing along a pcb track with a resistance of 50mohm, produces a 5mV ground voltage, of which 4.74mV appears at the amplifier input. (The other circuit values are as illustrated in the diagram above). There is thus almost no voltage rejection. If the signal source is not grounded to the pcb, much greater rejection figures are produced. Thus a ground resistance of Rg = 100k produces 100dB of rejection.

    In practice, there will be stray capacitance between the signal source and ground, reducing the rejection as the frequency increases. With the circuit values quoted above, a ground capacitance Cg of 5pF reduces the rejection to 70dB at 10MHz.

In addition to a spot calculation at a defined frequency, a graph of rejection ratio versus frequency can be produced, as shown below. Up to five models can be plotted at once.

580_2.bmp (464874 bytes)

Curve 1, is a straight line, where Cg = 0pF, and curves 2 to 5 show the effect of increasing the capacitance Cg from 5pF to 50pF.

Differential Amplifier

The Differential amplifier arrangement is shown below:

580_3.bmp (472374 bytes)

    Similar data values can be specified as with the Single-ended amplifier, with the addition that a resistance Rde can be placed in the grounding path of the differential input resistors. The signal voltage Vs can again be grounded, or isolated via a grounding resistance Rg and stray capacitance Cg.

    With similar values used to the single-ended amplifier, and with the signal voltage grounded, the differential amplifier produces 26dB of rejection, against only 0.4dB with the single-ended amplifier. Isolating the signal voltage with a 100k resistor increases rejection to 72dB, which is less than is attained by isolating ther single-ended amplifier source. Adding stray capacitance reduces the rejection ratio as the frequency increases.

    Other measures which can be taken to improve rejection are to decrease the signal source resistance Rs, and to include resistance Rde in the differential input ground path.

Differential mode radiated emission

    Differential mode currents flow in opposite directions in two conductors connecting parts of a circuit, and are independant of the ground plane. If the conductors were extremely close together, practically no external field would result, although finite separations produce an emitting current loop. Current flowing in that loop can then give rise to emissions, which are often related to the signals flowing in the loop. This should be contrasted to common mode currents, where the same currents flow in the same direction along the two conductors, flowing through stray capacitance via ground, and not related to signals. In many cases the common mode current will produce larger emissions than the differential mode current, and may be harder to control. Nonetheless, control of loop areas on a pcb is an important step in minimising emssions from the pcb. Differential current mode is shown in the upper diagram, and common mode in the lower diagram.

    The differential mode emissions Tool provides an assessment of whether a current loop on a pcb will cause emissions above a specified level. If that is the case, a reduction in loop area, frequency content, or shielding will probably be required to meet the specification. If however differential mode emissions are below specification limits, common mode emissions could still produce out of limit measurements.

Dm-form.gif (11118 bytes)

    The Tool can be used in three ways. Firstly, a single frequency can be entered, along with nominal dimensions of the loop, the distance from the source to the measurement point (set at a default of the normal measurement distance of 10m), and the current in the loop. A spot analysis of field in both V/m, and dBuV/m is then available.

    The field versus frequency characteristic for the defined loop and current can also be plotted.
    The third means of use is to import parameters from the last Fourier analysis of a trapezoidal waveform. The Fourier Tool allows a clock signal for instance to be defined in terms of its frequency, peak value, and the transition time of the rising and falling edges.

    The analysis of harmonic current can then be combined with the Differential Field analysis, to produce a plot of the field strength versus harmonic frequency, an example of which is shown below. The increasing efficiency of the radiating loop (increasing as the square of the frequency), tends to offset the declining harmonic content of the clock signal, producing a field spectrum which is only falling slowly with frequency. Increases in the transition time of the clock signal can then be assessed as a means of reducing emissions, along with reduction in the loop area.

Dm-g.gif (9533 bytes)

Example plot of the differential mode emissions when a 20mA, 5MHz squarewave (20ns rise and fall times) is applied to a 55mm square loop on a pcb. The fourier harmonics have been obtained from the Fourier analysis tool.

The field strength is proportional to current (I) and loop area (A), and inversely proportional to distance from the source (r), and is given by the following expression:

            E = ( 2.63 * 10 - 14 * f 2 * A * I ) / r        V/m

    Field strength also increases with the square of the frequency (f).

    The Tool is applicable where the largest dimension of the loop is less than a quarter wavelength; at higher frequencies, phase differences around the loop will produce reductions in field strength from point to point.

    Note also that specification limits for emitted fields can be superimposed on the plots.

Common mode radiated emission

Common Mode currents flow in interconnecting cables, and use a ground path as a return. Common Mode currents can originate due to potentials on a pcb caused by finite track impedance. The current is then injected onto interconnecting cables, which act as antennae, as shown in the simplified diagram below.

Cmrad.gif (2051 bytes)

    A pcb resistance Rg of 10mohms, carrying a digital signal current of 100mA, will produce a ground potential of 1mV. The I/O cable can have an antenna impedance of the order of a few hundred ohms, and this results in common mode currents of the order of a few microamps (e.g. 4uA for an impedance of 250 ohms, and a 1mV ground potential).

    Examination of the following expression for the field due to common mode current will show that fields which require mA of differential mode current, require only microamps of common mode current to generate the same field:

            E = ( 1.26 * 10 -6 * f * l * I ) / r        V / m

    where f is the frequency, l is the cable length, I is the common mode current, and r is the distance from the source. For example, a current of 4uA in a cable 1 metre long, produces a field of 25uV / m at 10m distance, at 50MHz. 25uV / m can be expressed as 28dBuV / m. This compares to a EN55022 Class B limit of 30dBuV/m.

    The Common Mode Radiation Tool uses the data input form shown below:

Cm-f.gif (10821 bytes)

    The expression for the electric field is valid up to a quarter wavelength, and the maximum model frequency is indicated in the analysis. Plotting the field versus frequency shows that the field measured in dBuV/m increases linearly with log ( frequency).

    The Tool also allows the field to be plotted at a series of discrete frequencies, which represent the Fourier harmonics of a trapezoidal waveform. To use this feature, first enter the details of a digital signal in the Fourier: Trapezoidal tool, found under the Periodic sub-menu. When the Common Mode Radiation Tool is subsequently selected, the Periodic waveform details are displayed at the bottom right of the form. Note that the Current value entered in the Fourier form should be the estimate of Common Mode current, typically of the order of uA. This can be estimated from a knowledge of the ground track/plane impedance at the digital signal fundamental (using the Ground Plane and Track Impedances Tool). Thus:

        Ground Potential Vg = Ground Plane Impedance * Digital Signal Current

        e.g. Vg = 5 mohms * 100mA, = 0.5mV.

    The Common Mode current Icm can then be estimated from:

        Icm = Vg / Antenna Impedance, where this is a few hundred ohms.

    Calculation of Common Mode currents is not a precise science, due to the uncertainty of the return path for displacement current, and the precise geometry of the radiating antennae. Nonetheless, an understanding of the levels of field produced by CM currents of the order of microamperes, originating from digital signals can help to introduce control measures.

    A Fourier plot of the field due to a 4uA current caused by a 1MHz digital, with 10ns rise and fall times is shown below:

Cm-g.gif (9571 bytes)

    The field level is flat up to a frequency of 1 / Pi * Tr , where Tr is the risetime of the fundamental. Above this frequency, the emissions decline at a rate of 20dB per decade. (The envelope of the emissions has been drawn on the Fourier plot manually).

Methods of reducing emissions due to common mode currents are centered around reduction of the common mode current itself. These include:

    Minimising the ground track impedances on the pcb, by using a ground plane, or by using a gridded ground track arrangement. The external ground connection, between the pcb and 'true' ground should be made as close as possible to the point of connection of the interconnecting cables. These measures will reduce the ground plane potential, and the common mode current which is driving the antenna formed by the interconnecting cables.

    Reduction of the high frequency content of digital signals, by use of the slowest logic which is compatible with the circuit design.

    Shielding the interconnecting cables.

    Providing decoupling capacitors to shunt the current to ground at the point of connection of the cables. The capacitance values must be chosen so as not to excessively attenuate the wanted signals.

    Providing a common mode choke in series with the interconnecting cables. This technique does not require a clean ground, but will be limited by the value of inductance which can be achieved. As the antenna impedance is of the order of hundreds of ohms, the choke impedance must be at least the same value to have virtually any effect. Increasing the value of inductance will lower the self-resonant frequency, above which the choke will have a decreasing effect.

    As with other aspects of emc design, the importance of a controlled ground layout, which separates noisy ground areas from quiet areas, is vital.

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