Click on the following bookmarks for further details of a PCB Tool for emc analysis:
The data entry form allows definition of the basic decoupling capacitance, and any residual ground inductance and resistance. The pulse is defined by a current pulse for a defined period, and a spot analysis provides the voltage at the end of the pulse. For instance, a nominal 5 volt supply supported by a 1nF capacitor, supplying a 30ns wide 50mA current demand, droops to a device voltage of 3.7 volts at the pulse end.
The plot function produces a graph of the entire voltage/time behaviour, and indicates the pulse end with a vertical line, as shown in the plot below for the above parameters.
The effect of ground inductance is to cause an initial dip in the voltage at the device.
This tool calculates the characteristic impedance of the track geometries shown below:
In all cases, the relative dielectric constant Er of the surrounding
medium can be defined. The equations used for each calculation are as follows.
This tool examines stripline and microstrip tracks, and calculates their propagation delay and characteristic impedance. The relative dielectric constant of the medium can be specified, and a default entry of 4.5 is supplied, corresponding to epoxy glass. The geometrical details are shown below:
In addition to the basic line properties, the effect of device
capacitance may also be estimated. The lumped capacitance entered is then calculated as a
distributed capacitance per unit length.
For equivalent dimensions, microstrip supports slightly faster
transition times before transmission line effects may occur.
Balanced lines offer, in principle, infinite rejection to common
mode signals, these being cancelled out at the load. However, any imbalance in the amount
of capacitance from either line to ground will result in a net signal at the load. The dB
ratio of the load voltage to the common mode signal is defined here as the common mode
rejection ratio. For a perfectly balanced system this is infinitely large.
A spot analysis of the common mode rejection ratio is provided at the selected frequency, whilst a plot may also be made. If the two capacitances are entered as equal values, a message warns that the rejection ratio will be infinite. A typical plot is shown below.
A continuous ground plane offers a significantly reduced rf
impedance compared to a pcb track. The low resistance and inductance of the ground plane
will reduce supply impedance and reduce ground loop noise. At higher frequencies, skin
effect causes the ground plane impedance to rise, although this is proportional to the
square root of frequency.
A set of common materials is provided in a pull-down list, providing
conductivity and permeability values. In the example shown, a 50mm long pcb track has an
impedance of 1.44 ohms at 5MHz, whilst a ground plane of the same copper thickness has an
impedance of only 0.8 mohms per square. As long as the ground plane was much wider than
50mm, the actual impedance between two points 50mm apart would be 0.8 mohms.
The Amplifier Grounding Noise tool analyses two situations where currents flowing in a ground path are coupled to a signal path, subsequently appearing at the input of an amplifier. A single-ended amplifier and a differential amplifier respond in different manners to ground path noise, and different measures can be taken to improve noise rejection.
The worse case performance is produced when the signal source Vs is grounded to the pcb ground (Rg = 0). Ground currents flowing between the point where the amplifier is grounded and the signal source ground are then the source of amplifier input voltages.
For example, a 100mA current flowing along a pcb track with a resistance of 50mohm, produces a 5mV ground voltage, of which 4.74mV appears at the amplifier input. (The other circuit values are as illustrated in the diagram above). There is thus almost no voltage rejection. If the signal source is not grounded to the pcb, much greater rejection figures are produced. Thus a ground resistance of Rg = 100k produces 100dB of rejection.
In practice, there will be stray capacitance between the signal source and ground, reducing the rejection as the frequency increases. With the circuit values quoted above, a ground capacitance Cg of 5pF reduces the rejection to 70dB at 10MHz.
In addition to a spot calculation at a defined frequency, a graph of rejection ratio versus frequency can be produced, as shown below. Up to five models can be plotted at once.
Curve 1, is a straight line, where Cg = 0pF, and curves 2 to 5 show the
effect of increasing the capacitance Cg from 5pF to 50pF.
The Differential amplifier arrangement is shown below:
Similar data values can be specified as with the Single-ended amplifier, with the addition that a resistance Rde can be placed in the grounding path of the differential input resistors. The signal voltage Vs can again be grounded, or isolated via a grounding resistance Rg and stray capacitance Cg.
With similar values used to the single-ended amplifier, and with the signal voltage grounded, the differential amplifier produces 26dB of rejection, against only 0.4dB with the single-ended amplifier. Isolating the signal voltage with a 100k resistor increases rejection to 72dB, which is less than is attained by isolating ther single-ended amplifier source. Adding stray capacitance reduces the rejection ratio as the frequency increases.
Other measures which can be taken to improve rejection are to decrease the signal source resistance Rs, and to include resistance Rde in the differential input ground path.
Differential mode currents flow in opposite directions in two
conductors connecting parts of a circuit, and are independant of the ground plane. If the
conductors were extremely close together, practically no external field would result,
although finite separations produce an emitting current loop. Current flowing in that loop
can then give rise to emissions, which are often related to the signals flowing in the
loop. This should be contrasted to common mode currents, where the same currents flow in
the same direction along the two conductors, flowing through stray capacitance via ground,
and not related to signals. In many cases the common mode current will produce larger
emissions than the differential mode current, and may be harder to control. Nonetheless,
control of loop areas on a pcb is an important step in minimising emssions from the pcb.
Differential current mode is shown in the upper diagram, and common mode in the lower
The Tool can be used in three ways. Firstly, a single frequency can
be entered, along with nominal dimensions of the loop, the distance from the source to the
measurement point (set at a default of the normal measurement distance of 10m), and the
current in the loop. A spot analysis of field in both V/m, and dBuV/m is then available.
Example plot of the differential mode emissions when a 20mA, 5MHz squarewave (20ns rise and fall times) is applied to a 55mm square loop on a pcb. The fourier harmonics have been obtained from the Fourier analysis tool.
The field strength is proportional to current (I) and loop area (A), and inversely
proportional to distance from the source (r), and is given by the following expression:
Common Mode currents flow in interconnecting cables, and use a ground path as a return. Common Mode currents can originate due to potentials on a pcb caused by finite track impedance. The current is then injected onto interconnecting cables, which act as antennae, as shown in the simplified diagram below.
A pcb resistance Rg of 10mohms, carrying a digital signal current of
100mA, will produce a ground potential of 1mV. The I/O cable can have an antenna impedance
of the order of a few hundred ohms, and this results in common mode currents of the order
of a few microamps (e.g. 4uA for an impedance of 250 ohms, and a 1mV ground potential).
The expression for the electric field is valid up to a quarter
wavelength, and the maximum model frequency is indicated in the analysis. Plotting the
field versus frequency shows that the field measured in dBuV/m increases linearly with log
The field level is flat up to a frequency of 1 / Pi * Tr , where Tr
is the risetime of the fundamental. Above this frequency, the emissions decline at a rate
of 20dB per decade. (The envelope of the emissions has been drawn on the Fourier plot
Methods of reducing emissions due to common mode currents are centered around
reduction of the common mode current itself. These include:
Westbay Technology Ltd, Main Street, Baycliff, Ulverston, Cumbria LA12 9RN, England
Tel: 01229 869 798 (from the United Kingdom) Tel: +44 1229 869 798 (International) Contact by e-mail